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| FDMW2512NZ October 2005 FDMW2512NZ Monolithic Common Drain N-Channel 2.5V Specified PowerTrench(R) MOSFET General Description This dual N-Channel MOSFET has been designed using Fairchild Semiconductor's advanced Power Trench process to optimize the RDS(ON) @ VGS = 2.5v on special MicroFET lead frame with all the drains on one side of the package. Features * 7.2 A, 20 V RDS(ON) = 26 m @ VGS = 4.5 V RDS(ON) = 34 m @ VGS = 2.5 V * ESD protection Diode(note 3) * Low Profile - 0.8 mm maximum - in the new package MicroFET 2 x 5 mm Applications * Li-Ion Battery Pack PIN 1 S1 S1 G1 G2 Bottom Drain Contact 4 Q2 3 G1 S2 5 6 2 S1 1 S1 S2 S2 S2 G2 Q1 Bottom Drain Contact MLP 2x5 Absolute Maximum Ratings Symbol VDSS VGSS ID PD TJ, TSTG TA=25oC unless otherwise noted Parameter Drain-Source Voltage Gate-Source Voltage Drain Current - Continuous - Pulsed Power Dissipation (Steady State) Ratings 20 12 7.2 28 2.2 0.8 -55 to +150 Units V V A W C (Note 1a) (Note 1a) (Note 1b) Operating and Storage Junction Temperature Range Thermal Characteristics RJA RJA Thermal Resistance, Junction-to-Ambient Thermal Resistance, Junction-to-Ambient (Note 1a) (Note 1b) 55 145 C/W Package Marking and Ordering Information Device Marking 2512Z Device FDMW2512NZ Reel Size 13'' Tape width 12mm Quantity 3000 units (c)2005 Fairchild Semiconductor Corporation FDMW2512NZ Rev D FDMW2512NZ Electrical Characteristics Symbol BVDSS BVDSS TJ IDSS IGSS VGS(th) VGS(th) TJ RDS(on) TA = 25C unless otherwise noted Parameter Drain-Source Breakdown Voltage Breakdown Voltage Temperature Coefficient Zero Gate Voltage Drain Current Gate-Body Leakage, (Note 2) Test Conditions VGS = 0 V, ID = 250 A Min 20 Typ Max Units V Off Characteristics ID = 250 A, Referenced to 25C VDS = 16 V, VGS = 12 V, VGS = 0 V VDS = 0 V 0.5 0.8 -3 19 20 22 23 25 30 12 1 10 1.5 mV/C A A V mV/C m On Characteristics Gate Threshold Voltage Gate Threshold Voltage Temperature Coefficient Static Drain-Source On-Resistance ID = 250 A VDS = VGS, ID = 250 A, Referenced to 25 C VGS = 4.5 V, ID = 7.2 A ID = 7.2 A VGS = 4.0 V, ID = 6.4 A VGS = 3.1 V, ID = 6.4 A VGS = 2.5 V, VGS = 4.5 V, ID = 7.2 A, TJ=125C VDS = 5 V, ID =7.2 A 26 28 32 34 39 gFS Ciss Coss Crss RG Forward Transconductance S Dynamic Characteristics Input Capacitance Output Capacitance Reverse Transfer Capacitance Gate Resistance (Note 2) VDS = 15 V, f = 1.0 MHz f = 1.0 MHz V GS = 0 V, 740 165 127 1.4 pF pF pF Switching Characteristics td(on) tr td(off) tf Qg Qgs Qgd VSD trr Qrr Notes: Turn-On Delay Time Turn-On Rise Time Turn-Off Delay Time Turn-Off Fall Time Total Gate Charge Gate-Source Charge Gate-Drain Charge Drain-Source Diode Forward Voltage Diode Reverse Recovery Time Diode Reverse Recovery Charge VDD = 10 V, VGS = 4.5 V, ID = 1 A, RGEN = 6 8 10 16 13 16 20 29 23 13 ns ns ns ns nC nC nC VDS = 10 V, VGS = 4.5 V ID = 7.2 A, 9 1 3 Drain-Source Diode Characteristics VGS = 0 V, IS = 1.8 A (Note 2) 0.7 15 4 1.2 V nS nC IF = 7.2 A, dIF/dt = 100 A/s 1. RJA is the sum of the junction-to-case and case-to-ambient thermal resistance where the case thermal reference is defined as the solder mounting surface of the drain pins. RJC is guaranteed by design while RCA is determined by the user's board design. a) 55C/W when mounted on a 1in2 pad of 2 oz copper b) 145C/W when mounted on a minimum pad of 2 oz copper Scale 1 : 1 on letter size paper 2. Pulse Test: Pulse Width < 300s, Duty Cycle < 2.0% 3. The diode connected between the gate and source serves only as protection againts ESD. No gate overvoltage rating is implied. FDMW2512NZ Rev D FDMW2512NZ Typical Characteristics 50 3.5V ID, DRAIN CURRENT (A) 40 35 30 25 20 15 10 5 0 0 1 2 3 4 VDS, DRAIN-SOURCE VOLTAGE (V) 1.8V 2.0V 2.5V RDS(ON), NORMALIZED DRAIN-SOURCE ON-RESISTANCE 45 VGS = 4.5V 3.0V 2.4 2.2 2 VGS = 1.8V 1.8 1.6 2.0V 1.4 1.2 1 0.8 0 5 10 15 20 25 30 ID, DRAIN CURRENT (A) 2.5V 3.1V 4.0V 4.5V Figure 1. On-Region Characteristics. Figure 2. On-Resistance Variation with Drain Current and Gate Voltage. 0.074 RDS(ON), ON-RESISTANCE (OHM) 1.6 RDS(ON), NORMALIZED DRAIN-SOURCE ON-RESISTANCE ID = 7.2A VGS = 4.5V 1.4 ID = 3.6A 0.066 0.058 0.05 TA = 125oC 1.2 0.042 0.034 0.026 0.018 0.01 TA = 25oC 1 0.8 0.6 -50 -25 0 25 50 75 100 o 125 150 1 2 3 4 5 TJ, JUNCTION TEMPERATURE ( C) VGS, GATE TO SOURCE VOLTAGE (V) Figure 3. On-Resistance Variation with Temperature. 30 IS, REVERSE DRAIN CURRENT (A) Figure 4. On-Resistance Variation with Gate-to-Source Voltage. 100 VDS = 5V 25 ID, DRAIN CURRENT (A) 20 15 10 5 0 0.5 1 1.5 TA = -55oC 125oC 25oC VGS = 0V 10 1 TA = 125oC 0.1 25oC 0.01 -55oC 0.001 0.0001 2 2.5 3 0 0.2 0.4 0.6 0.8 1 1.2 VGS, GATE TO SOURCE VOLTAGE (V) VSD, BODY DIODE FORWARD VOLTAGE (V) Figure 5. Transfer Characteristics. Figure 6. Body Diode Forward Voltage Variation with Source Current and Temperature. FDMW2512NZ Rev D FDMW2512NZ Typical Characteristics 5 VGS, GATE-SOURCE VOLTAGE (V) ID = 7.2A 4 15V 3 CAPACITANCE (pF) 1200 VDS = 5V 10V 1000 f = 1MHz VGS = 0 V Ciss 800 600 400 2 Coss 200 1 Crss 0 0 2 4 6 8 10 12 Qg, GATE CHARGE (nC) 0 0 4 8 12 16 20 VDS, DRAIN TO SOURCE VOLTAGE (V) Figure 7. Gate Charge Characteristics. 100 P(pk), PEAK TRANSIENT POWER (W) RDS(ON) LIMIT ID, DRAIN CURRENT (A) 10 1ms 10ms 100ms 1s 10s DC VGS = 4.5V SINGLE PULSE RJA = 145oC/W TA = 25oC 0.01 0.1 1 10 100 VDS, DRAIN-SOURCE VOLTAGE (V) 100us 50 Figure 8. Capacitance Characteristics. 40 SINGLE PULSE RJA = 145C/W TA = 25C 30 1 20 0.1 10 0 0.001 0.01 0.1 1 t1, TIME (sec) 10 100 1000 Figure 9. Maximum Safe Operating Area. Figure 10. Single Pulse Maximum Power Dissipation. r(t), NORMALIZED EFFECTIVE TRANSIENT THERMAL RESISTANCE 1 D = 0.5 RJA(t) = r(t) * RJA RJA =145 C/W P(pk) t1 t2 TJ - TA = P * RJA(t) Duty Cycle, D = t1 / t2 SINGLE PULSE 0.2 0.1 0.1 0.05 0.02 0.01 0.01 0.0001 0.001 0.01 0.1 t1, TIME (sec) 1 10 100 1000 Figure 11. Transient Thermal Response Curve. Thermal characterization performed using the conditions described in Note 1b. Transient thermal response will change depending on the circuit board design. FDMW2512NZ Rev D FDMW2512NZ Dimensional Outline and Pad Layout FDMW2512NZ Rev D TRADEMARKS The following are registered and unregistered trademarks Fairchild Semiconductor owns or is authorized to use and is not intended to be an exhaustive list of all such trademarks. ACExTM FAST(R) ActiveArrayTM FASTrTM BottomlessTM FPSTM Build it NowTM FRFETTM CoolFETTM GlobalOptoisolatorTM CROSSVOLTTM GTOTM DOMETM HiSeCTM EcoSPARKTM I2CTM E2CMOSTM i-LoTM EnSignaTM ImpliedDisconnectTM FACTTM IntelliMAXTM FACT Quiet SeriesTM Across the board. Around the world.TM The Power Franchise(R) Programmable Active DroopTM DISCLAIMER ISOPLANARTM LittleFETTM MICROCOUPLERTM MicroFETTM MicroPakTM MICROWIRETM MSXTM MSXProTM OCXTM OCXProTM OPTOLOGIC(R) OPTOPLANARTM PACMANTM POPTM Power247TM PowerEdgeTM PowerSaverTM PowerTrench(R) QFET(R) QSTM QT OptoelectronicsTM Quiet SeriesTM RapidConfigureTM RapidConnectTM SerDesTM ScalarPumpTM SILENT SWITCHER(R) SMART STARTTM SPMTM StealthTM SuperFETTM SuperSOTTM-3 SuperSOTTM-6 SuperSOTTM-8 SyncFETTM TinyLogic(R) TINYOPTOTM TruTranslationTM UHCTM UltraFET(R) UniFETTM VCXTM WireTM FAIRCHILD SEMICONDUCTOR RESERVES THE RIGHT TO MAKE CHANGES WITHOUT FURTHER NOTICE TO ANY PRODUCTS HEREIN TO IMPROVE RELIABILITY, FUNCTION OR DESIGN. FAIRCHILD DOES NOT ASSUME ANY LIABILITY ARISING OUT OF THE APPLICATION OR USE OF ANY PRODUCT OR CIRCUIT DESCRIBED HEREIN; NEITHER DOES IT CONVEY ANY LICENSE UNDER ITS PATENT RIGHTS, NOR THE RIGHTS OF OTHERS. LIFE SUPPORT POLICY FAIRCHILD'S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT DEVICES OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF FAIRCHILD SEMICONDUCTOR CORPORATION. As used herein: 2. A critical component is any component of a life 1. Life support devices or systems are devices or support device or system whose failure to perform can systems which, (a) are intended for surgical implant into be reasonably expected to cause the failure of the life the body, or (b) support or sustain life, or (c) whose support device or system, or to affect its safety or failure to perform when properly used in accordance with instructions for use provided in the labeling, can be effectiveness. reasonably expected to result in significant injury to the user. PRODUCT STATUS DEFINITIONS Definition of Terms Datasheet Identification Advance Information Product Status Formative or In Design Definition This datasheet contains the design specifications for product development. Specifications may change in any manner without notice. This datasheet contains preliminary data, and supplementary data will be published at a later date. Fairchild Semiconductor reserves the right to make changes at any time without notice in order to improve design. This datasheet contains final specifications. Fairchild Semiconductor reserves the right to make changes at any time without notice in order to improve design. Preliminary First Production No Identification Needed Full Production Obsolete Not In Production This datasheet contains specifications on a product that has been discontinued by Fairchild semiconductor. The datasheet is printed for reference information only. Rev. I17 |
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